hyupupup's repositories
conv_systolic_array
(Verilog) A simple convolution layer implementation with systolic array structure
HowToCook
程序员在家做饭方法指南。Programmer's guide about how to cook at home (Chinese only).
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Vitis-AI
Vitis AI is Xilinx’s development stack for AI inference on Xilinx hardware platforms, including both edge devices and Alveo cards.
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