fyasir11

A-convolution-kernel-implemented-by-Vivado-HLS

This project implements a convolution kernel based on vivado HLS on zcu104

CNN-using-HLS

Convolutional Neural Network Using High Level Synthesis

ES203-COA-CNN

ES-203 Computer Organization & Architecture CNN on FPGA board

gemm_hls

Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.

High-Level-Synthesis-Flow-on-Zynq-using-Vivado-HLS

This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems using Vivado HLS. Now under 2018.2 version.

hls_tutorial_examples

Examples shown as part of the tutorial "Productive parallel programming on FPGA with high-level synthesis".

hlslib

A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.

Tiny_YOLO_v3_ZYNQ

Implement Tiny YOLO v3 on ZYNQ

Vitis-HLS-Introductory-Examples

vivado_hls

Source codes for High Level Synthesis for Fixed Progammable Gate Arrays (FPGAs). Can be converted to RTL using Vivado HLS or SDSoC.

vivado_hls_tutorial

Source code of basic Xilinx Vivado HLS image processing tutorial using HLS openCV functions