fpgasystems / fpga-network-stack

Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)

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Not able to ping VCU118 board.

IshtiyaqueShaikh opened this issue · comments

Hi,
I have followed process for generating bit stream for VCU118. I got evaulation license for ethernet_10g_ip from xilinx. As per my network configuration i haved changed mac adress, ip address and default gateway in tcp_ip_top.v/network_module.v
After all above changes i am not able to ping the board. I have put ILA and try to see if some activity is showing on parallel RX/TX interface of mac. If i start udp iperf client i can see packet coming on parallel TX interface of MAC but it is not coming out of board . I have run tcpdump on iperf server but no activity. The most basic ping is also not coming on parallel RX interface. Can anyone suggest way to debug further ?

regards,
Ishtiyaque Shaikh

I also mirror the FPGA port and see arp is coming on mirror port. Is there any way we can debug ethernet_10g_ip ? I see no activity on RX parallel interface going to TOE.

Hi @IshtiyaqueShaikh
Please try out the latest release.
We tested it for 10G and 100G. Make sure the clock on the vcu118 is programmed to 156.25Mhz

David

The problem was with hardware QSFP1 port of the VCU118 board. We change constraint file to use QSFP2 port which fix this issue.