Possible IR and x86_64 codegen optimizations

[Mireille]

• RSB lhs, #0 should be translated to NEG (TODO: check implications for flags)
• Merge chained immediate ADDs and SUBs (and other arithmetic operations)
  • Example:

    005 add var9_result, var7_shift_result, 0x000000B0
    006 add var11_result, var9_result, 0x04000000