Ifediora's repositories
arduino-esp32
Arduino core for the ESP32
esp-partition-gui
A Partition Manager for the ESP range of IoT Boards
Matrix-Display
Simulation of arduino driven Matrix Display in Proteus
riscv-isa-manual
RISC-V Instruction Set Manual
neorv32
🖥️ A tiny, customizable and highly extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
nrf-cus
NRF52 BLE EINK Custom Service
riscv-tools
RISC-V Tools (GNU Toolchain, ISA Simulator, Tests)
riscvxx-unknown-elf-prebuilt
riscv-unknown-elf- prebuilt toolchain
SBC
A single board computer that assembles 8085 and 8051 instruction sets into an on-board memory and emulates both from there.
shepherd
Contributions to shepherd https://github.com/geissdoerfer/shepherd/ & https://github.com/orgua/shepherd/
xv6
xv6 Kernel on QEMU for RISCV & x86
ztachip
Opensource software/hardware platform to build edge AI solutions deployed on FPGA or custom ASIC hardware.