f9micro / f9-kernel

An efficient and secure microkernel built for ARM Cortex-M cores, inspired by L4

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Implement Thumb-2 optimized memcpy/memset

jserv opened this issue · comments

Directory kernel/lib contains the implementation of memcpy and memset, but it is too generic. We can utilize several ARM Cortex-M3/M4 specific features to optimize:

  • Thumb-2
    • apply 32-bit aligned data copy in inner loop, which is not necessary to Cortex-M3/M4, but it could be better for the external memory access depending on memory controller.
  • unaligned memory access
  • PLD instruction to preload cache with memory source

lk implements arm-m optimized memcpy and memset routines in git commit littlekernel/lk@33b94d9

@jserv The profile result:

  1. unalignment
    unalignment
  2. alignment
    alignment

It looks so weird. Can you explain?

@jserv The implementation is the branch.
https://github.com/gapry/f9-kernel/blob/benchmark_memcpy/benchmark/benchmark.c

My approach is that measure the case, alignment and unalignment, five times and take the avg time. Assume my approach is correct, the data imply the conclusion is the unalignment case is better than alignment after the optimized on the stm32F407.

@gapry In order to clarify the performance gain, please compare the optimized memcpy routines with plain byte-oriented C version.

@jserv What does plain byte-oriented mean ?

The simplest and inefficient implementation of memcpy:

void memcpy(void* src, void* dst, size_t len)
{
    char* p = (char*)src;
    char* q = (char*)dst;
    while(len--) *p++ = *q++;
}

@jserv For now, I use DWT to measure the elapsed clock cycles. You can check the commit: gapry@33e58df

and the completed Implementation: https://github.com/gapry/f9-kernel/blob/benchmark_memcpy/benchmark/benchmark.c

The profile result:
unalignment:
dwt_unalign

alignment:
dwt_align

@gapry I don't think your benchmarking is valid since it doesn't represent the variance. There must be something wrong.