Openocd read_bank failes to read from flash (OCD-752)

Question

Openocd read_bank failes to read from flash (OCD-752)

jimmyw opened this issue a year ago · comments

Jimmy Wennlund commented a year ago

Development Kit

No devkit

Module or chip used

ESP32S3

Debug Adapter

openocd

OpenOCD version

v0.11.0-esp32-20221026

Operating System

Linux

Using an IDE ?

No

OpenOCD command line

openocd -f board/esp32s3-builtin.cfg -c init -c "reset halt" -c "flash read_bank 0 core.dmp 8216576 135168" -c reset -c shutdown

JTAG Clock Speed

40000

ESP-IDF version

v5.0.1

Problem Description

I am trying to download a crash dump from flash using jtag in our CI system, esptool.py is to unstable when on USB, if the board comes in to a crash loop, or something happens its don't reliable.

There is really no documentation that I could find, but had semi luck with this command:

openocd -f board/esp32s3-builtin.cfg -c init -c "reset halt" -c "esp compression off" -c "esp flash_stub_clock_boost on" -c "flash read_bank 0 core.dmp 8216576 135168" -c reset -c shutdown

If I download the same partition with esptool.py

esptool.py --port /dev/ttyUSB-4.4-00 read_flash 8216576 135168 test.dmp
And compare the checksums, they differ in content,

55bbed4f3bd715eb119ea628a3c39d1cb646f938  core.dmp
3d14e1a91b6049c1aebf1a9624858ede516d7092  test.dmp

And the one that I downloaded over jtag is failed checksum

espcoredump.py --chip esp32s3 info_corefile -t raw -c core.dmp build/hub-esp32.elf

Comparing the output shows random bytes scattered that got corrupted.

I am using JTAG over USB.

Debug Logs

openocd -f board/esp32s3-builtin.cfg -c init -c "reset halt"  -c "flash read_bank 0 core5.dmp 8216576 135168" -c reset -c shutdown
Open On-Chip Debugger v0.11.0-esp32-20221026 (2022-10-26-14:47)
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.org/doc/doxygen/bugs.html
Info : only one transport option; autoselect 'jtag'
Info : esp_usb_jtag: VID set to 0x303a and PID to 0x1001
Info : esp_usb_jtag: capabilities descriptor set to 0x2000
Warn : Transport "jtag" was already selected
Info : esp_usb_jtag: serial (68:B6:B3:47:FF:1C)
Info : esp_usb_jtag: Device found. Base speed 40000KHz, div range 1 to 255
Info : clock speed 40000 kHz
Info : JTAG tap: esp32s3.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32s3.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : starting gdb server for esp32s3.cpu0 on 3333
Info : Listening on port 3333 for gdb connections
Info : [esp32s3.cpu0] Target halted, PC=0x4037C0D2, debug_reason=00000000
Info : [esp32s3.cpu0] Reset cause (3) - (Software core reset)
Info : [esp32s3.cpu1] Debug controller was reset.
Info : [esp32s3.cpu1] Core was reset.
Info : JTAG tap: esp32s3.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32s3.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : [esp32s3.cpu0] requesting target halt and executing a soft reset
Info : [esp32s3.cpu0] Target halted, PC=0x4037C0D2, debug_reason=00000000
Info : Set GDB target to 'esp32s3.cpu0'
Info : [esp32s3.cpu1] Target halted, PC=0x4037C0D2, debug_reason=00000000
Info : [esp32s3.cpu1] Reset cause (3) - (Software core reset)
Info : [esp32s3.cpu0] Debug controller was reset.
Info : [esp32s3.cpu0] Core was reset.
Info : [esp32s3.cpu0] Target halted, PC=0x500000EF, debug_reason=00000000
Info : [esp32s3.cpu0] Reset cause (3) - (Software core reset)
Info : [esp32s3.cpu1] requesting target halt and executing a soft reset
Info : [esp32s3.cpu0] Core was reset.
Info : [esp32s3.cpu0] Target halted, PC=0x40000400, debug_reason=00000000
Info : [esp32s3.cpu1] Debug controller was reset.
Info : [esp32s3.cpu1] Core was reset.
Info : [esp32s3.cpu1] Target halted, PC=0x40000400, debug_reason=00000000
Info : [esp32s3.cpu1] Reset cause (3) - (Software core reset)
Info : [esp32s3.cpu0] Reset cause (3) - (Software core reset)
Info : [esp32s3.cpu0] Target halted, PC=0x403B2482, debug_reason=00000001
Info : Flash mapping 0: 0x20020 -> 0x3c0e0020, 346 KB
Info : Flash mapping 1: 0x80020 -> 0x42000020, 893 KB
Info : [esp32s3.cpu0] Target halted, PC=0x403B2482, debug_reason=00000001
Info : Auto-detected flash bank 'esp32s3.cpu0.flash' size 16384 KB
Info : Using flash bank 'esp32s3.cpu0.flash' size 16384 KB
Info : [esp32s3.cpu0] Target halted, PC=0x403B2482, debug_reason=00000001
Info : PROF: Data transferred in 991.83 ms @ 133.087 KB/s
wrote 135168 bytes to file core5.dmp from flash bank 0 at offset 0x007d6000 in 1.808203s (73.001 KiB/s)

Info : JTAG tap: esp32s3.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32s3.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : [esp32s3.cpu0] requesting target halt and executing a soft reset
Info : [esp32s3.cpu0] Debug controller was reset.
Info : [esp32s3.cpu0] Core was reset.
Info : [esp32s3.cpu0] Target halted, PC=0x500000EF, debug_reason=00000000
Info : [esp32s3.cpu0] Reset cause (3) - (Software core reset)
Info : [esp32s3.cpu1] requesting target halt and executing a soft reset
Info : [esp32s3.cpu0] Core was reset.
Info : [esp32s3.cpu1] Debug controller was reset.
Info : [esp32s3.cpu1] Core was reset.
Info : [esp32s3.cpu0] Target halted, PC=0x40041A79, debug_reason=00000000
Info : [esp32s3.cpu0] Reset cause (3) - (Software core reset)
Info : [esp32s3.cpu1] Target halted, PC=0x40043A3B, debug_reason=00000000
Info : [esp32s3.cpu1] Reset cause (3) - (Software core reset)
shutdown command invoked

Expected behavior

The images downloaded in Flash should match the ones downloaded over uart.

Screenshots

No response

Erhan Kurubas · Answer 1 · Wed May 10 2023 00:10:36 GMT+0800 (China Standard Time)

@jimmyw do you see same differences for the smaller address or lengths? Or can you test writing and reading to the same address with jtag?

You can send below commands from telnet.

halt
flash write_bank 0 test.dmp 8216576
flash read_bank 0 test_read.dmp 8216576 135168

esptool.py --port /dev/ttyUSB-4.4-00 read_flash 8216576 135168 test_read2.dmp

I did similar tests but didn't see an issue. What is your total flash size and flash type?

Jimmy Wennlund · Answer 2 · Wed May 10 2023 06:25:28 GMT+0800 (China Standard Time)

@erhankur Thanks for your reply.

I actually got successful now, I changed to call with these parameters:

openocd -f board/esp32s3-builtin.cfg -c init -c "reset halt" -c "esp compression off" -c "esp flash_stub_clock_boost on" -c "flash read_bank 0 logs/crash.dmp 8216576 135168" -c reset -c shutdown

I found them in the esp_program function and tried them. Not sure which one that actually fixed it.

Not sure what stub_clock_boost is doing, does this make sense?

Im using a ESP32-S3-WROOM-1U module.

Erhan Kurubas · Answer 3 · Wed May 10 2023 08:12:11 GMT+0800 (China Standard Time)

stub_clock_boost is a command for setting the clock speed to the maximum possible value, so we wanted to shorten the stub flasher command execution time.

I couldn't get the differences with the previous parameters. What did you change and have a successful reading from the jtag?