[esp32s3] Change cfg setting to act by default as custom appimage_offset (OCD-742)

Question

[esp32s3] Change cfg setting to act by default as custom appimage_offset (OCD-742)

KonssnoK opened this issue a year ago · comments

Hello guys,
in our project we use a partition table which allows the bootloader to use its maximum size (0x10000) instead of the default one (0x8000).

When running openocd to debug, we simply add
esp32s3 appimage_offset 0x100000
as command and we are fine.

Problem is when we want to use an external tool which interfaces with app_trace. I can't find a way to put the appimage_offset in the correct position without the core resetting at some point (and apparently and losing the setting)

Where can i change such value in the openocd scripts
xtensa-core-esp32s3.cfg
xtensa-core-esp32.cfg

so that i don't have to issue the appimage_offset command anymore?

Thanks

Here is the script i tried to use to setup everything

target extended-remote localhost:3333
mon echo test0
!tz wait 1000
mon echo test1
mon esp32s3 appimage_offset 0x100000
mon echo test2
gdb_memory_map disable
mon echo test3
set mem inaccessible-by-default off
mon reset halt
mon esp32s3 appimage_offset 0x100000
flushregs
set remote hardware-watchpoint-limit 2

Attaching a log of core blocking after multiple tries of setting the values


Open On-Chip Debugger v0.11.0-esp32-20221026-3-ga0539ec7-dirty (2023-02-18-14:05)
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.org/doc/doxygen/bugs.html
Info : only one transport option; autoselect 'jtag'
Info : esp_usb_jtag: VID set to 0x303a and PID to 0x1001
Info : esp_usb_jtag: capabilities descriptor set to 0x2000
Warn : Transport "jtag" was already selected
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : esp_usb_jtag: serial (7C:DF:A1:E2:A3:04)
Info : esp_usb_jtag: Device found. Base speed 40000KHz, div range 1 to 255
Info : clock speed 40000 kHz
Info : JTAG tap: esp32s3.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32s3.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : starting gdb server for esp32s3.cpu0 on 3333
Info : Listening on port 3333 for gdb connections
Info : [esp32s3.cpu0] Target halted, PC=0x4038050D, debug_reason=00000000
Info : [esp32s3.cpu0] Reset cause (3) - (Software core reset)
Info : [esp32s3.cpu1] Target halted, PC=0x40041A79, debug_reason=00000000
Info : [esp32s3.cpu1] Reset cause (3) - (Software core reset)
Info : accepting 'gdb' connection on tcp/3333
Info : [esp32s3.cpu0] Target halted, PC=0x403804C3, debug_reason=00000000
Info : Set GDB target to 'esp32s3.cpu0'
Info : [esp32s3.cpu1] Target halted, PC=0x40041A7C, debug_reason=00000000
Warn : No symbols for FreeRTOS!
Info : [esp32s3.cpu0] Target halted, PC=0x403B2482, debug_reason=00000001
Error: Failed to get flash maps (4294967295)!
Warn : Failed to get flash mappings (-4)!
Info : [esp32s3.cpu0] Target halted, PC=0x403B2482, debug_reason=00000001
Info : [esp32s3.cpu0] Target halted, PC=0x403B2482, debug_reason=00000001
Info : Auto-detected flash bank 'esp32s3.cpu0.flash' size 8192 KB
Info : Using flash bank 'esp32s3.cpu0.flash' size 8192 KB
Info : [esp32s3.cpu0] Target halted, PC=0x403B2482, debug_reason=00000001
Error: Failed to get flash maps (4294967295)!
Warn : Failed to get flash mappings (-4)!
Info : [esp32s3.cpu0] Target halted, PC=0x403B2482, debug_reason=00000001
Info : Using flash bank 'esp32s3.cpu0.irom' size 0 KB
Info : [esp32s3.cpu0] Target halted, PC=0x403B2482, debug_reason=00000001
Error: Failed to get flash maps (4294967295)!
Warn : Failed to get flash mappings (-4)!
Info : [esp32s3.cpu0] Target halted, PC=0x403B2482, debug_reason=00000001
Info : Using flash bank 'esp32s3.cpu0.drom' size 0 KB
Info : New GDB Connection: 1, Target esp32s3.cpu0, state: halted
Warn : negative reply, retrying
Error: Too large number of threads 572660574!
test0
test1
Info : [esp32s3.cpu0] Target halted, PC=0x403B2482, debug_reason=00000001
Info : Flash mapping 0: 0x100020 -> 0x3c160020, 405 KB
Info : Flash mapping 1: 0x170020 -> 0x42000020, 1406 KB
Info : Using flash bank 'esp32s3.cpu0.irom' size 1408 KB
Info : [esp32s3.cpu0] Target halted, PC=0x403B2482, debug_reason=00000001
Info : Flash mapping 0: 0x100020 -> 0x3c160020, 405 KB
Info : Flash mapping 1: 0x170020 -> 0x42000020, 1406 KB
Info : Using flash bank 'esp32s3.cpu0.drom' size 408 KB
Info : [esp32s3.cpu0] Target halted, PC=0x403B2482, debug_reason=00000001
Info : Flash mapping 0: 0x100020 -> 0x3c160020, 405 KB
Info : Flash mapping 1: 0x170020 -> 0x42000020, 1406 KB
Info : Using flash bank 'esp32s3.cpu1.irom' size 1408 KB
Info : [esp32s3.cpu0] Target halted, PC=0x403B2482, debug_reason=00000001
Info : Flash mapping 0: 0x100020 -> 0x3c160020, 405 KB
Info : Flash mapping 1: 0x170020 -> 0x42000020, 1406 KB
Info : Using flash bank 'esp32s3.cpu1.drom' size 408 KB
test2
test3
Info : JTAG tap: esp32s3.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32s3.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : [esp32s3.cpu0] requesting target halt and executing a soft reset
Info : [esp32s3.cpu0] Debug controller was reset.
Info : [esp32s3.cpu0] Core was reset.
Info : [esp32s3.cpu0] Target halted, PC=0x500000EF, debug_reason=00000000
Info : [esp32s3.cpu0] Reset cause (3) - (Software core reset)
Info : [esp32s3.cpu1] requesting target halt and executing a soft reset
Info : [esp32s3.cpu0] Core was reset.
Info : [esp32s3.cpu0] Target halted, PC=0x40000400, debug_reason=00000000
Info : [esp32s3.cpu1] Debug controller was reset.
Info : [esp32s3.cpu1] Core was reset.
Info : [esp32s3.cpu1] Target halted, PC=0x40000400, debug_reason=00000000
Info : [esp32s3.cpu1] Reset cause (3) - (Software core reset)
Info : [esp32s3.cpu0] Reset cause (3) - (Software core reset)
Info : [esp32s3.cpu0] Target halted, PC=0x403B2482, debug_reason=00000001
Info : Flash mapping 0: 0x100020 -> 0x3c160020, 405 KB
Info : Flash mapping 1: 0x170020 -> 0x42000020, 1406 KB
Info : Using flash bank 'esp32s3.cpu0.irom' size 1408 KB
Info : [esp32s3.cpu0] Target halted, PC=0x403B2482, debug_reason=00000001
Info : Flash mapping 0: 0x100020 -> 0x3c160020, 405 KB
Info : Flash mapping 1: 0x170020 -> 0x42000020, 1406 KB
Info : Using flash bank 'esp32s3.cpu0.drom' size 408 KB
Info : [esp32s3.cpu0] Target halted, PC=0x403B2482, debug_reason=00000001
Info : Flash mapping 0: 0x100020 -> 0x3c160020, 405 KB
Info : Flash mapping 1: 0x170020 -> 0x42000020, 1406 KB
Info : Using flash bank 'esp32s3.cpu1.irom' size 1408 KB
Info : [esp32s3.cpu0] Target halted, PC=0x403B2482, debug_reason=00000001
Info : Flash mapping 0: 0x100020 -> 0x3c160020, 405 KB
Info : Flash mapping 1: 0x170020 -> 0x42000020, 1406 KB
Info : Using flash bank 'esp32s3.cpu1.drom' size 408 KB
Info : JTAG tap: esp32s3.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32s3.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : [esp32s3.cpu0] requesting target halt and executing a soft reset
Info : [esp32s3.cpu0] Debug controller was reset.
Info : [esp32s3.cpu0] Core was reset.
Info : [esp32s3.cpu0] Target halted, PC=0x500000EF, debug_reason=00000000
Info : [esp32s3.cpu0] Reset cause (3) - (Software core reset)
Info : [esp32s3.cpu1] requesting target halt and executing a soft reset
Info : [esp32s3.cpu0] Core was reset.
Info : [esp32s3.cpu0] Target halted, PC=0x40000400, debug_reason=00000000
Info : [esp32s3.cpu1] Debug controller was reset.
Info : [esp32s3.cpu1] Core was reset.
Info : [esp32s3.cpu1] Target halted, PC=0x40000400, debug_reason=00000000
Info : [esp32s3.cpu1] Reset cause (3) - (Software core reset)
Info : [esp32s3.cpu0] Reset cause (3) - (Software core reset)
Info : [esp32s3.cpu0] Target halted, PC=0x403B2482, debug_reason=00000001
Info : Flash mapping 0: 0x100020 -> 0x3c160020, 405 KB
Info : Flash mapping 1: 0x170020 -> 0x42000020, 1406 KB
Info : Using flash bank 'esp32s3.cpu0.irom' size 1408 KB
Info : [esp32s3.cpu0] Target halted, PC=0x403B2482, debug_reason=00000001
Info : Flash mapping 0: 0x100020 -> 0x3c160020, 405 KB
Info : Flash mapping 1: 0x170020 -> 0x42000020, 1406 KB
Info : Using flash bank 'esp32s3.cpu0.drom' size 408 KB
Info : [esp32s3.cpu0] Target halted, PC=0x403B2482, debug_reason=00000001
Info : Flash mapping 0: 0x100020 -> 0x3c160020, 405 KB
Info : Flash mapping 1: 0x170020 -> 0x42000020, 1406 KB
Info : Using flash bank 'esp32s3.cpu1.irom' size 1408 KB
Info : [esp32s3.cpu0] Target halted, PC=0x403B2482, debug_reason=00000001
Info : Flash mapping 0: 0x100020 -> 0x3c160020, 405 KB
Info : Flash mapping 1: 0x170020 -> 0x42000020, 1406 KB
Info : Using flash bank 'esp32s3.cpu1.drom' size 408 KB
Info : [esp32s3.cpu1] Debug controller was reset.
Info : [esp32s3.cpu1] Core was reset.
Info : [esp32s3.cpu1] Target halted, PC=0x40041A76, debug_reason=00000000
Info : [esp32s3.cpu1] Reset cause (3) - (Software core reset)``

Erhan Kurubas · Answer 1 · Tue Apr 25 2023 04:43:52 GMT+0800 (China Standard Time)

Do I understand correctly, running OpenOCD with the command line argument doesn't work for you?

-c "init; halt; esp appimage_offset 0x100000; resume

-c "init; halt; esp appimage_offset 0x100000; esp apptrace start con: 0; resume"

You need to send halt command before appimage_offset. You don't need to reset the device. Then send resume to continue running.

Kons · Answer 2 · Tue Apr 25 2023 04:58:13 GMT+0800 (China Standard Time)

@erhankur no the problem is not using appimage_offset,
the question is : how to have 0x10000 as default value in the scripts :)

Erhan Kurubas · Answer 3 · Thu Apr 27 2023 00:14:35 GMT+0800 (China Standard Time)

You can add it to -event gdb-attach and try. It is inside esp32.cfg and esp32s3.cfg

$_TARGETNAME_0 configure -event gdb-attach {
	$_TARGETNAME_0 xtensa smpbreak BreakIn BreakOut
	# necessary to auto-probe flash bank when GDB is connected
	halt 1000
	
        esp appimage_offset 0x100000
	# main flash bank
	flash probe 0
	# IROM
	flash probe 1
	# DROM
	flash probe 2
}

Kons · Answer 4 · Fri Apr 28 2023 13:19:12 GMT+0800 (China Standard Time)

thanks! i'll give it a try ! :)

Erhan Kurubas · Answer 5 · Mon Jun 12 2023 21:17:17 GMT+0800 (China Standard Time)

@KonssnoK Did you try it? Can we close the issue?

Kons · Answer 6 · Wed Jun 14 2023 15:08:01 GMT+0800 (China Standard Time)

sorry, we had to shift priorities.. let's close, in case i'll open another ticket if necessary... thanks again