Supports building SystemVerilog for the ulx3s using open source tools yosys, nextpnr, and Project Trellis. Includes test support using verilator and googletest.
The example is a blinking LED which flashes around once a second.
Project template for FPGA dev
Supports building SystemVerilog for the ulx3s using open source tools yosys, nextpnr, and Project Trellis. Includes test support using verilator and googletest.
The example is a blinking LED which flashes around once a second.
Project template for FPGA dev