Dominik Salvet (dominiksalvet)

dominiksalvet

Geek Repo

Company:@vutbr

Twitter:@dominik_salvet

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Dominik Salvet's repositories

asus-fan-control

Fan control for ASUS devices running Linux

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gitpack

Git-based package manager written in POSIX shell

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risc63

Custom 64-bit pipelined RISC processor

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limen-alpha

Dual-core 16-bit RISC processor

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vhdl-collection

Collection of generic VHDL modules

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afc-scout

ACPI scout of asus-fan-control

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cpurast

Software-based rasterization library

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gim

Simple installation manager for your Git projects.

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template

Template for repositories with GitHub features

vhdldep

Generate VHDL dependencies in a Makefile format

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tine-alpha

8-bit MISC processor with pipelining

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bachelor-thesis

Bachelor thesis about designing a 64-bit pipelined processor

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crypto-addr-extract

Extract cryptocurrency addresses from big datasets

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huffman-codec

Adaptive Huffman coding with extra features

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limen

16-bit RISC processor with von Neumann architecture

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pcycle

My first processor written in HDL language

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six-alpha

Accumulator-based 4-bit processor

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ux430ua-jack-volume

Fix low volume of ASUS ZenBook UX430UA running Linux

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asus-zenbook-ux430ua-linux-setup

Set up ASUS ZenBook UX430UA to work correctly with Linux.

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high-school-thesis

High school thesis about designing a 16-bit processor

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nconv

Number converter with two's complement and arbitrary precision

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pathfinding-robots

Simple robot game demonstrating pathfinding

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uvod_do_vhdl

Stručný úvod do VHDL od úplného začátku

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afc-gui

GUI for the asus-fan-control project

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biriscv

32-bit Superscalar RISC-V CPU

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biriscv-env

biRISC-V - 32-bit dual issue RISC-V CPU Software Environment

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Cores-VeeR-EH1

VeeR EH1 core

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cva5

The CORE-V CVA5 is an Application class 5-stage RISC-V CPU specifically targetting FPGA implementations.

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the-hardisc

Hardened RISC-V core

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