Denis Pereira de Lima's repositories
100-redteam-projects
Projects for security students
7-Segment-LED-Display
Display 0-9 digits on 7 Segment Display using Arduino. The number counts down from 9 to 0
academic-responsive-template
Academic Responsive (AR) Website Template
Auto_NoC_DES_Simulator
Automatic Discrete Event Simulator for NoCs using SimEvent's toolbox of MathWorks
Booksim_custom_traffic
Booksim 2.0 NoC simulator has been modified to accept custom application specific traffics
circuitosdigitais
Disciplina de Circuitos Digitais
compilers
Plume - A new programming language built from scratch as learning tool
DenisPlima
Config files for my GitHub profile.
Hacking-Security-Ebooks
Top 100 Hacking & Security E-Books (Free Download)
HNOCS
HNoCS: Modular Open-Source Simulator for Heterogeneous NoCs.
ia870p3
Migration to Python 3
Icarus_Verilog
This repo contains code snippets written in verilog as part of course Computer Architecture of my university curriculum
matmult
A floating-point matrix multiplication implemented in hardware
MOEA-ISa
A multi-objective evolutionary algorithm with interval based initialization and self-adaptive crossover operator for large-scale feature selection in classification
nocsim
Network On Chip SIMulator
noctweak
SystemC-Based Simulator for Early Exploration of Networks On-Chip
noxim
Network on Chip Simulator
PAT-Noxim
cycle accurate Network-on-Chip Simulator
PlatEMO-4
Evolutionary multi-objective optimization platform
pynoxim
Python script to run noxim (https://github.com/davidepatti/noxim) in a simple and better way
reproblems
A set of real-world multi-objective optimization problems
SAAD-SentimentAnalysisAnomalyDetection
Anomaly Detection with Sentiment Analysis on Twitter
SNKVerilog
Verilog definitions of custom SNK chips, for repairs and preservation.
SoCDep2
A python based simulator for testing dependability mechanisms on NoCs
Software-Engineering
Learning Software Engineering :turtle:
tennis-rankings
Tennis ranking for Club Players
tnoc
Network on Chip Implementation written in SytemVerilog
ULA-VHDL
A simple ULA made using VHDL