deepelixir's repositories
c-101
c++ basics
core_ddr3_controller
A DDR3 memory controller in Verilog for various FPGAs
cpp-cheat-sheet
C++ Syntax, Data Structures, and Algorithms Cheat Sheet
CS6600-ComputerArchitecture
Assignment files from the graduate level Computer Architecture Course at IIT Madras.
cosa
A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)
deepelixir.github.io
My site
EE2003-Computer-Organisation
5-stage Pipelined Implementation of RV32I ISA; includes single cycle implementation of the same and other assignments from EE2003 Computer Organisation (Fall 2020, IITM)
html_css_001
Html CSS practice website
jpeg-compressor
C++ JPEG compression/fuzzed low-RAM JPEG decompression codec with Public Domain or Apache 2.0 license
Learn-LLVM-12
Learn LLVM 12, published by Packt
Light-HLS
Fast, Accurate and Convenient Light-Weight HLS Framework for Academic Design Space Exploration and Evaluation. (LLVM-11)
marss-riscv
TinyEMU based full system cycle-level micro-architectural research simulator for single-core RISC-V systems
matchlib
SystemC/C++ library of commonly-used hardware functions and components for HLS.
Neural-Networks-on-Silicon
This is originally a collection of papers on neural network accelerators. Now it's more like my selection of research on deep learning and computer architecture.
out-of-order-cpu-simulator
A C version of out-of-order CPU simulator
RecommendationSystemPractice
Recommendation System Practice links
Red-Onion-ReactJS
It is a single page application made with ReactJS, Tailwind CSS etc...
RISC-V-TLM
RISC-V SystemC-TLM simulator
riscv-vp
RISC-V Virtual Prototype
riscv_em
Simple risc-v emulator, able to run linux, written in C.
scftgu
SystemC study material, examples, exercises.
SeqToSeq
Seq to Seq in pytorch including Transformer
stm32_ptpd
Example PTPD slave and master projects for NUCLEO-F429ZI development boards.
systemc_tlm_101
SystemC TLM basics from Doulos
tnoc
Network on Chip Implementation written in SytemVerilog
torchrs
PyTorch implementation of popular datasets and models in remote sensing
VeriGPU
OpenSource GPU, in Verilog, loosely based on RISC-V ISA