Mitch Bailey (d-m-bailey)

d-m-bailey

Geek Repo

Company:Shuhari System

Location:Japan

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Mitch Bailey's repositories

cvc

CVC: Circuit Validity Checker. Check for errors in CDL netlist.

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extra_be_checks

Extra backend checks for sky130

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sky130_fd_io

Repo for schematics of the sky130 I/O ring foundry cells.

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10-50---11-35-Overview-of-new-devices-in-the-era-of-Beyond-CMOS

Presentation slide for US/Japan workshop 2024 May

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caravel

Caravel is a standard SoC hardness with on chip resources to control and read/write operations from a user-dedicated space.

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caravel-gf180mcu

This repository is the GF180MCU port of Caravel. For more information about Caravel, see the original repo at https://github.com/efabless/caravel.

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caravel_mgmt_soc_gf180mcu

This repository is the GF180MCU port of management core for Caravel. For more information about the Caravel management SoC, see https://github.com/efabless/caravel_mgmt_soc_litex.

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caravel_user_project_old

https://caravel-user-project.readthedocs.io

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caravel_mini

Multi-Project Support for Caravel

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gf180mcu_fd_io

Repo for schematics of the gf180mcu I/O ring foundry cells.

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magic

Magic VLSI Layout Tool

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mpw-5_sky130A

The full pdk of sky130a for efabless mpw-5

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netgen

Netgen complete LVS tool for comparing SPICE or verilog netlists

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open_pdks

PDK installer for open-source EDA tools and toolchains. Distributed with a setup for the Google/SkyWater 130nm process.

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OpenFASOC

Fully Open Source FASOC generators built on top of open-source EDA tools

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openframe_user_project

Example digital project for the Efabless Caravel "openframe" harness

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openlane-openroad

OpenLANE is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, Fault and custom methodology scripts for design exploration and optimization.

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sscs-ose-code-a-chip.github.io

IEEE Solid-State Circuits Society (SSCS) Open-Source Ecosystem (OSE)

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