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cnshijin / fpga-network-stack

TCP/IP Network Stack for FPGAs

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TCP/IP Stack Design Using Vivado HLS

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TCP/IP Network Stack for FPGAs

License:BSD 3-Clause "New" or "Revised" License

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Language:C++ 44.5%Language:Verilog 26.8%Language:VHDL 21.5%Language:Python 4.7%Language:Tcl 2.4%Language:Shell 0.2%