CISPA

GhostWrite

Proof-of-concept for the GhostWrite CPU bug.

Security-RISC

Proof-of-concept implementation for the paper "A Security RISC: Microarchitectural Attacks on Hardware RISC-V CPUs" (IEEE S&P 2023)

CacheWarp

Proof-of-concept implementation for the paper "CacheWarp: Software-based Fault Injection using Selective State Reset" (USENIX Security 2024)

osiris

Proof-of-concept implementation for the paper "Osiris: Automated Discovery of Microarchitectural Side Channels" (USENIX Security'21)

loop-DoS

Repository for application-layer loop DoS

cascading-spy-sheets

This repository contains the artifact for our paper "Cascading Spy Sheets: Exploiting the Complexity of Modern CSS for Email and Browser Fingerprinting" published at NDSS 2025.

hammulator

Proof-of-concept implementation for the paper "Hammulator: Simulate Now - Exploit Later" (DRAMSec 2023)

http-conformance

Code for our 2024 ACM AsiaCCS Paper "Who's Breaking the Rules? Studying Conformance to the HTTP Specifications and its Security Impact"

xs-observations

Code for our 2023 IEEE S&P Paper "The Leaky Web: Automated Discovery of Cross-Site Information Leaks in Browsers and the Web"

LLCSliceReversing

This repository contains the artifact for the IEEE S&P 2025 paper: "Rapid Reversing of Non-Linear CPU Cache Slice Functions: Unlocking Physical Address Leakage"

IRQGuard

Framework to effectively immediately stop ongoing microarchitectural Attacks with low-overhead. (ACSAC '24)

scase

Automated Framework for recovering Secrets from Side-Channel Traces. (USENIX Security '25)

login-security-landscape

Code for our 2024 IEEE S&P Paper "To Auth or Not To Auth? A Comparative Analysis of the Pre- and Post-Login Security Landscape"

ShadowLoad

Switchpoline

Proof-of-concept implementation for the paper "Switchpoline: A Software Mitigation for Spectre-BTB and Spectre-BHB on ARMv8" (AsiaCCS 2024)

constant-time-compilers

CVA6-Vivado-Project-with-Xilinx-AXI-Ethernet

Vivado 2023.2 project built around the CVA6 RISC-V CPU and a software stack including u-boot and embedded linux.

Lixom

MAPAlloc

PeripheralInstinct

ansible-role-proxmox

IaC for Proxmox VE clusters.

PortPrint

security-header-parsing

Code for our 2025 ACM CCS Paper "Head(er)s Up! Detecting Security Header Inconsistencies in Browsers"

WebREC

This repository provides the code is used in the Usenix paper "Web Execution Bundles: Reproducible, Accurate, and Archivable Web Measurements".

analogdevices-hdl-lib

HDL libraries and projects

cva6

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

cva6-sdk

CVA6 SDK containing RISC-V tools and Buildroot

Fontention

scase-traces

trust-me-if-you-can