chosun-student2 / hwdbg

HyperDbg's chip-level hardware debugger

Geek Repo:Geek Repo

Github PK Tool:Github PK Tool

hwdbg

Description

hwdbg is a chip-level debugger written in chisel. (This is a work in progress and not yet ready for testing!).

Test

You should now have a working Chisel3 project.

You can run the included test with:

sbt test

Alternatively, if you use Mill:

mill hwdbg.test

You should see a whole bunch of output that ends with something like the following lines

[info] Tests: succeeded 1, failed 0, canceled 0, ignored 0, pending 0
[info] All tests passed.
[success] Total time: 5 s, completed Dec 16, 2020 12:18:44 PM

If you see the above then the test was successful.

ModelSim

If you want to use ModelSim instead of GTKWave, you can configure the modelsim.config file. Please visit here for more information.

Output

The final generated codes for fuzzy controllers are available in the generated directory.

License

hwdbg and all its submodules and repos, unless a license is otherwise specified, are licensed under GPLv3 LICENSE.

About

HyperDbg's chip-level hardware debugger

License:GNU General Public License v3.0


Languages

Language:Scala 53.6%Language:Python 22.9%Language:SystemVerilog 22.9%Language:Tcl 0.5%Language:Forth 0.1%