cfelton / test_jpeg

This is a myhdl test environment for the open-cores jpeg_encoder.

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Testing infrastructure skip if simulators not available

cfelton opened this issue · comments

With our test infrastructure, to make it easier for developers and users, the conversion (convertible testbenches) should be skipped if the target simulators are not present. A function should be added and the pytest.mark.skipif(not target_sim_present) (or something like this).

Also, similar to the myhdl pytest configuration the target simulator should be passed via a command line argument py.test --sim=ghdl. Each test should support a VHDL and Verilog simulator. There should be a default as well. Refer to the myhdl test suite for examples.

I have generated a partial solution for the first part (simsok = sim_available('ghdl') and sim_available('iverilog')) but it needs to be made more generic and extendible. It should check the selected simulator (--sim and the default) and determine if it is present and skip the conversion tests if not present.

This is reasonable because significant work can be completed with only the myhdl simulators it is very useful for the conversion tests to be skip for systems without the tools installed. The continuous-integration (travis) will always run the conversion tests the tests will always be ran and checked before commits. The ci should be updated to run both ghdl and iverilog.

cc: @mkatsimpris, @Vikram9866