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capstone-engine / capstone

Capstone disassembly/disassembler framework for ARM, ARM64 (ARMv8), Alpha, BPF, Ethereum VM, HPPA, M68K, M680X, Mips, MOS65XX, PPC, RISC-V(rv32G/rv64G), SH, Sparc, SystemZ, TMS320C64X, TriCore, Webassembly, XCore and X86.

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Can capstone recognize fmv.w.x instruction in RISCV ?

HyLanc opened this issue · comments

commented

I have tried both llvm-objdump and capstone.
The llvm-objdump can't recognize this instruction (fmv.w.x), and capstone disassem failed.
Only riscv64-unknown-elf-objdump can recognize (fmv.w.x).

My problem is that I have written code by using capstone to disassemble riscv binary to assembly language for later analysis, and Capstone is deeply coupling with my code. Can this issue be solved by updating the Capstone version?

commented

I found that in file capstone/arch/RISCV/RISCVGenInsnNameMaps.inc have a line { RISCV_INS_FMV_W_X, "fmv.w.x" }, and the comment said this file is auto generated data for capstone. Does this means capstone do support fmv.w.x instruction but why it disassem failed when fmv.w.x exists in assembly?

commented

The RISCV module is outdated unfortunately (depends on LLVM 7 if I am not mistaken). We definitely have updating it on our list. With pretty high priority. It is such an important architecture, but the LLVM instruction definitions of it are not of high quality. So we will discuss it first internally how to update it or newly implement it in the best way.

commented

thanks ! I'll try some other ways to implement my code.