brightclark

1st-CLaaS

Framework for developing and deploying FPGA logic in the cloud as a microservice for web and cloud applications

benchmark

A microbenchmark support library

blog

📚 专注前端与算法

core_ddr3_controller

A DDR3 memory controller in Verilog for various FPGAs

DDRCourses

DDR Courses collection for stepmania

elixir

Elixir is a dynamic, functional language designed for building scalable and maintainable applications

euvm

Embedded UVM (D Language port of IEEE UVM 1.0)

flx

Fuzzy matching for Emacs ... a la Sublime Text.

googletest

Googletest - Google Testing and Mocking Framework

LDPC-codes

Software for Low Density Parity Check codes

LxRunOffline

A full-featured utility for managing Windows Subsystem for Linux (WSL)

MDL-SDK

NVIDIA Material Definition Language SDK

melpa

Recipes and build machinery for the biggest Emacs package repo

mockito

Most popular Mocking framework for unit tests written in Java

myhdl

The MyHDL development repository

nmigen

A refreshed Python toolbox for building complex digital hardware

openofdm

Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.

opentitan

OpenTitan: Open source silicon root of trust

perl5

🐫The Perl language interpreter.

Practical-UVM-Step-By-Step

This is the main repository for all the examples for the book Practical UVM

s6_pcie_microblaze

PCI Express DIY hacking toolkit for Xilinx SP605

seL4

The seL4 microkernel

slang

SystemVerilog compiler and language services

spacemacs

A community-driven Emacs distribution - The best editor is neither Emacs nor Vim, it's Emacs *and* Vim!

sv-tests

Test suite designed to check compliance with the SystemVerilog standard.

testng

TestNG testing framework

tnoc

Network on Chip Implementation written in SytemVerilog

travis-build

.travis.yml => build.sh converter

vivado-boards

warp-v

WARP-V is an open-source RISC-V CPU core generator written in TL-Verilog.