avivbur / parallella-hw

Parallella board design files

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alt tag PARALLELLA: Supercomputing for Everyone

This repository contains open source board and FPGA designs associated with the Parallella project.

Board Designs

Board Description CAD Status
daughtercard Daugher Card Template KiCad Production
kvision UAV daughter card Altium Prototype
library CAD librares Various Prouction
meta PCI 104 board N/A Concept
para-tile Breakout board Eagle Prototype
parallella Kickstarter Parallella Allegro Production
parallella-rf RF board (wip) Pads Concept
parallella-fmc FMC SDR adapter board Allegro Production
parallella-4k HPC board N/A Concept
porcupine Breakout board KiCad Production

FPGA Design Sources

All Parallella related FPGA sources have been moved to the OH! library library and released under MIT license.

License

Board design files are released under the Creative Common Share Alike license unlesss otherwise specified.

Contribution

We are looking for external contribution to to the Parallella project! If you have something to contribute in the area of board, system, FPGA design, dig in! All pull requests will be considered. Instructions for contributing can be found HERE.

How to do a pull-requeste

  1. Fork this repository to your personal github account using the 'fork' button 2. above
  2. Clone your 'parallella-hw' fork to a local computer using 'git clone'
  3. Create a new sub-directory at the root of the repo
  4. Add your project files with the appropriate license clearly stated
  5. Add a README.md file (see the skeleton directory for a template)
  6. Use git add-->git commit-->git push to add changes to your fork of 'parallella-examples'
  7. Submit a pull request by clicking the 'pull request' button on YOUR github 'parallella-examples' repo.

About

Parallella board design files

License:Other


Languages

Language:VHDL 91.9%Language:Coq 4.3%Language:Verilog 2.4%Language:KiCad Layout 0.7%Language:Eagle 0.2%Language:Tcl 0.2%Language:Groff 0.1%Language:AGS Script 0.0%Language:Python 0.0%Language:OpenEdge ABL 0.0%Language:OpenSCAD 0.0%Language:C++ 0.0%Language:C 0.0%Language:Perl 0.0%Language:Shell 0.0%Language:HTML 0.0%Language:Makefile 0.0%Language:Batchfile 0.0%