Antonson J's repositories
SHA256-Accelerator-Hardware
This project aims at implementing an hardware accelerator peripheral for SHA256 hashing algorithm with AXI4 interfacing with PicoRV32 CPU. The project focuses on multiple implementations of the accelerator with gradual improvements through spatial pre-computation techniques and pipelining. The SHA256 accelerators are implemented using Verilog and synthesized using Yosys Open Synthesis Suite. The optimized designs are then compared with a base-line C implementation in software. Hash functions are used to securely store passwords, to quickly store and retrive data, and also to check if a file/message is corrupted.
EE4271-Elementary-Data-Structures-and-Algorithms
Solutions for EE4371 - Elementary DSA, IIT Madras
CAN
CAN related files
Daily-Sessions
Daily Sessions to help students get started
EasySearch
VS-Code extension for easy search
EE2703-Applied-Programming-Lab
IIT Madras
Electronics-Club-Task-1
This task is divided into 3 Mini-Tasks. This Repository is made inorder to fulfull the requirements for joining Electronics Club of IIT-Madras, as project member in the 2021-22 Tenure
Google-Kickstart-Python
Solution for GOOGLE KICKSTART, starting from ROUND E_ 2020
julia
The Julia Language: A fresh approach to technical computing.
RFR-DAQ-Suite
Raftar Formula Racing's DAQ Suite
Sha256_Hw_Accelerator
SHA256 hardware accelerator, synthesized for and mapped on the Zynq core of the Zybo board by Digilent
Whatsapp-semiautomation
Code for semiautomating whatsapp and sending messages from Whatsapp Web