Bug with division in MIPS interpreter
roganov opened this issue · comments
addi $t0, $0, 1
addi $t1, $0, 2
div $t0, $t1 # HI register must be 1
add $t0, $0, $0
mfhi $v0 # but actualy it's 0 ($v0 === 0)
If we comment out last but one line:
addi $t0, $0, 1
addi $t1, $0, 2
div $t0, $t1 # HI register must be 1
# add $t0, $0, $0
mfhi $v0 # $v0 == 1
it works as expected.