agra-uni-bremen's repositories
virtual-breadboard
Virtual Breadboard / PCB simulation for Prototyping and Educational Purposes
sifive-hifive1
This Repo contains documentation to the HiFive1 Board along with some example programs.
formal-iss
Generate an ISS for riscv-vp from a formal LibRISCV ISA model
virtual-bus
Simple protocol to connect two memory mapped buses (e.g. for Hardware In The Loop)
vp-integration-tests
Tests for peripherals and other utilities of the riscv-vp
hardbound-vp
Virtual Prototype with symbolic execution support and HardBound path analyzer
guix-symex
A Guix channel for reproducible symbolic execution research
icee2022-magic-adder-lib
Artifacts of the paper: "Investigating Various Adder Architectures for Digital In-Memory Computing Using MAGIC-Based Memristor Design Style"
libriscv-vp
RISC-V Virtual Prototype with ISS generated from LibRISCV
spike-libriscv
Spike RISC-V simulator but with a autogenerated LibRISCV backend
symsysc-experiments
Experiments and DUTs for SymSysC repo
virtual-breadboard-protocol
Protocol definitions for SoC Environment simultations.