Adrian Fiergolski (adrianf0)

adrianf0

Geek Repo

0

following

0

stars

Company:Fastree3D

Location:Renens VD; Switzerland

Github PK Tool:Github PK Tool

Adrian Fiergolski's repositories

hdlregs

A Python-based HDL register file generator

Language:PythonLicense:NOASSERTIONStargazers:3Issues:1Issues:0

xUDP

10G UDP stack

Language:VHDLStargazers:1Issues:4Issues:0

.emacs.d

My emacs configuration

Language:Emacs LispLicense:MITStargazers:0Issues:2Issues:0

cadence-ttc-pwm

PWM driver for Cadence Triple Timer Counter (TTC) IPs, as found on Xilinx Zynq SoCs

Language:CLicense:GPL-2.0Stargazers:0Issues:0Issues:0

calibre

The official source code repository for the calibre ebook manager

Language:PythonLicense:GPL-3.0Stargazers:0Issues:1Issues:0

device-tree-xlnx

Linux device tree generator for the Xilinx SDK (Vivado > 2014.1)

Language:TclStargazers:0Issues:1Issues:0

download-youtube-videos

A simple script to download youtube videos and playlists (and optionally encode them to mp3) using pafy

Language:PythonStargazers:0Issues:1Issues:0

eudaq

eudaq Data Acquisition Framework

Language:C++License:LGPL-3.0Stargazers:0Issues:1Issues:0

fpga-sdk-prj

FPGA-based SDK projects for SCRx cores

Language:VerilogLicense:NOASSERTIONStargazers:0Issues:0Issues:0

libavtp

Open source implementation of Audio Video Transport Protocol (AVTP) specified in IEEE 1722-2016 spec.

Language:CLicense:BSD-3-ClauseStargazers:0Issues:0Issues:0

linux-xlnx

The official Linux kernel from Xilinx

Language:CLicense:NOASSERTIONStargazers:0Issues:1Issues:0
Language:BitBakeLicense:MITStargazers:0Issues:0Issues:0

meta-qt5

QT5 layer for openembedded

Language:BitBakeLicense:MITStargazers:0Issues:0Issues:0

meta-xilinx

Xilinx device and board support for Yocto/OE-core.

Language:CLicense:MITStargazers:0Issues:0Issues:0

pyqt5

PyQt5 from riverbank

Language:C++License:GPL-3.0Stargazers:0Issues:0Issues:0

rsinc

A tiny, hackable, two-way cloud synchronisation client for Linux

Language:PythonLicense:MITStargazers:0Issues:0Issues:0

scr1

SCR1 is a high-quality open-source RISC-V MCU core in Verilog

Language:SystemVerilogLicense:NOASSERTIONStargazers:0Issues:1Issues:0

scr1-sdk

open-source SDK for SCR1 core

Language:CLicense:NOASSERTIONStargazers:0Issues:1Issues:0

xbmc-films-pl

Automatically exported from code.google.com/p/xbmc-films-pl

Language:PythonStargazers:0Issues:0Issues:0

xbmc-shotwell

Browse Shotwell pictures in XBMC (now Kodi)

Language:PythonStargazers:0Issues:1Issues:0