Generating IPI interrupts with guest QNX OS on top of QEMU with Xilinx

[asifsid-32]

Hello,

We are trying to configure/generate IPI interrupts using QEMU with guest OS as QNX and xilinx machine - xlnx-zcu102.
We are using following command to boot Guest OS -

./qemu-system-aarch64 -M xlnx-zcu102 -m 8G -serial mon:stdio -display none -device loader,file=QNX-IFS.bin,cpu-num=0 -global xlnx,zynqmp-boot.cpu-num=0 -global xlnx,zynqmp-boot.use-pmufw=true

We have tried following steps -

1. For generating the interrupts we created sender and receiver application in which sender application sets the IPI register bits
   i.e we are setting bit number 24 i.e 0x1000000. We used PL0 IPI in this and the corresponding IRQ number is 61
   (We are able to successfully write these bits to specific registers and have verified this by reading the registers. The base
   address currently is 0xFF300000U ).

2. In receiver application we are attaching corresponding IRQ number 61 using InterruptAttach().

3. pidin irqs command is also showing that interrupt handlers are registered.

But in the receiver side we are not able to trigger the specific interrupt that we set in the sender application.
The application is getting stuck at MsgReceive() at the receiver side reason being that correct IRQ was not triggered.

We have followed given xilinx reference https://www.xilinx.com/support/documentation/user_guides/ug1085-zynq-ultrascale-
trm.pdf , page no 322.

How can we configure/generate the interrupt and check that whether the interrupt is getting triggered or not ?

Regards
Asif