add hardware IP

[btwbtw01]

Can I add hardware IP into FINN by using Vivado HLS? My understanding of Vivado HLS is writing C code and synthesis, then combine Vivado PS block to generate bistream. The tutorial seems like using python to generate custom IP, and there is limit for generating custom IP. Am I right? If I generate bistream, how could I deploy on FPGA by PYNQ

[XilinxDublinLabs]

Too many questions heading down too many directions. Let me try to touch a few and point you further:

• FINN uses Vivado HLS to compile C++ implementations of the network layers into IP cores. Vivado is then used to stitch them into an overall IP via a block design. You could pick up this IP and continue with a custom flow in Vivado integrating it with whatever you like.
• Please, check the Pynq project for supported platforms and make sure you have one. FINN offers support for some Pynq targets.

Note that both questions are not related to FINN's HLS library. Please, consult the appropriate projects for documentation and help.