UofT-HPRC / fake_fpga

A GUI pretending to be a DE1 for visualizing Verilog sims

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fake_fpga

A GUI pretending to be a DE1 for visualizing Verilog sims. Please see the latest release (right-hand side of this page) for a pre-compiled Windows version. Otherwise, you can download the source code, compile it, and run it.

Compiling

To compile the GUI, run make in the GUI folder. There are instructions in GUI/README.txt to help you get started.

To compile the Modelsim plugin, follow the instructions in simulation/include/README.txt and simulation/lib/README.txt which ask you to copy come files from the modelsim install folder. Then, run make in the simulation folder.

Running

To run the GUI, just double-click run.bat in the GUI folder. Do this before starting the simulation. By the way, this batch file can be sourced from inside bash on a Linux system.

Likewise, you can just double-click demo.bat in the demo folder to run the demo. Note that this script uses relative paths to find fakefpga.vpi (the thing you make when you run make in the simulation directory), so you may need to edit the last line if your files are in different folders. By the way, demo.bat can also be sourced on Linux.

Acknowledgements

We would like to thank Ruiqi Wang for helping with the GUI.

Problems?

Contact me at marco.merlini@utoronto.ca

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A GUI pretending to be a DE1 for visualizing Verilog sims


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Language:Java 62.9%Language:C 25.3%Language:Verilog 7.1%Language:Batchfile 2.1%Language:Shell 1.2%Language:Makefile 0.8%Language:Tcl 0.6%