Add remaining hardware IP & Docs

[mackncheesiest]

The current project only has the RANCNetwork IP, not any of the example projects or documentation that tie it together with other components (the AXI input buffer, the TickGenerator, the host software for streaming data in/out...)

[VangelisMak]

Hi @mackncheesiest,
I was looking at the other IPs you added like the input_router. The file you have uploaded is initialized from a memory file "ir_file.mem". I couldn't find this file. I assume this file contains the initial input spikes for the network. How is this input generated?

Do you perhaps have the documentation for all the IPs you've uploaded? it would help to reproduce the whole system (RANCnetwork,InputRouter,OutcomeCore,TickGenerator and the AXI-StreamPacketBuffer)

Thanks :)