ThaumicMekanism / venus

RISC-V instruction set simulator built for education

Home Page:https://ThaumicMekanism.github.io/venus/

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[Request] Execute extra RISC-V code while debugging

ThaumicMekanism opened this issue · comments

Make it so that when you are paused at any point in the code, you could perform a RISC-V operation. This may be tricky.