SpinalHDL

A high level hardware description language

SpinalHDL's repositories

VexRiscv

A FPGA friendly 32 bit RISC-V CPU implementation

Language:AssemblyMIT2254 98 314

SpinalHDL

Scala based HDL

Language:ScalaNOASSERTION1518 78 652

NaxRiscv

Language:ScalaMIT222 24 82

SaxonSoc

SoC based on VexRiscv and ICE40 UP5K

Language:ScalaMIT141 23 31

SpinalWorkshop

Labs to learn SpinalHDL

Language:Scala127 10 16

SpinalTemplateSbt

A basic SpinalHDL project

Language:Scala69 9 23

SpinalCrypto

SpinalHDL - Cryptography libraries

Language:ScalaMIT46 13 3

openocd_riscv

Spen's Official OpenOCD Mirror

Language:CNOASSERTION42 6 22

VexiiRiscv

Like VexRiscv, but, Harder, Better, Faster, Stronger

Language:ScalaMIT42 9 4

Spinal-bootcamp

SpinalHDL-tutorial based on Jupyter Notebook

Language:Jupyter Notebook38 50

SpinalDoc

SpinalHDL documentation assets (pictures, slides, ...)

Language:HTML30 13 9

VexRiscvSocSoftware

Language:C24 8 3

SpinalDoc-RTD

The sources of the online SpinalHDL doc

Language:PythonCC0-1.022 11 54

CocotbLib

Language:PythonMIT13 9 2

NaxSoftware

Language:C7 8 1

rvls

RISCV lock-step checker based on Spike

Language:C++7 50

SpinalTemplateSbtDependencies

An SpinalHDL project example which use VexRiscv git as a dependency

Language:Scala4 50

docker

Language:Dockerfile3 90

SpinalNomad

Language:Dockerfile3 8 1

SpinalTemplateGradle

A basic SpinalHDL project, configured with Gradle instead of SBT

Language:Scala3 3 1

NaxRiscv-Rtd

Language:Python2 60

buildroot-spinal-saxon

Language:C1 40

riscv-compliance

Language:AssemblyBSD-3-Clause1 60

riscv-isa-sim

Spike, a RISC-V ISA Simulator

Language:CNOASSERTION1 20

VexiiRiscv-RTD

Language:PythonCC0-1.0100

buildroot

Buildroot, making embedded Linux easy. Note that this is not the official repository, but only a mirror. The official Git repository is at http://git.buildroot.net/buildroot/. Do not open issues or file pull requests here.

Language:MakefileNOASSERTION070

coremark

CoreMark® is an industry-standard benchmark that measures the performance of central processing units (CPU) and embedded microcrontrollers (MCU).

Language:CNOASSERTION070

embench-iot

The main Embench repository

Language:CGPL-3.0010

linux

Language:CNOASSERTION070

naxriscv_doc

MIT010