关于在 Verilog TestBench 中运行测试用例
saltanat3k opened this issue · comments
Makefile 開頭加上:
SHELL := /bin/bash
Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2
saltanat3k opened this issue · comments
Makefile 開頭加上:
SHELL := /bin/bash