Add support for SystemVerilog
SeanMcLoughlin opened this issue · comments
Sean McLoughlin commented
Language
SystemVerilog is the industry standard Hardware Description Language (HDL) used in the semiconductor industry for defining hardware designs and writing object-oriented code, constraint solvers, and assertions to verify those designs.
Prism currently only supports Verilog which is a much smaller subset of SystemVerilog.
Additional resources
SystemVerilog Wikipedia
SystemVerilog Language Reference Manual