How IRQ's are assigned ? I could see mostly one IRQ/few IRQ's gets assigned and splits the loads between different CPU's
Duraisankarp opened this issue · comments
I could see only one IRQ gets fired and CPU load is split across different CPU's. How can we make sure all the IRQ's get triggered ? or how to find out why other IRQ's are not active.
sample :
linux:~ # cat /proc/interrupts | grep input
25: 1293929 998595 21305 662767 PCI-MSI 49153-edge virtio0-input.0
27: 1 0 0 1 PCI-MSI 49155-edge virtio0-input.1
29: 0 0 0 0 PCI-MSI 49157-edge virtio0-input.2
31: 0 0 0 0 PCI-MSI 49159-edge virtio0-input.3
linux:~ # cat /proc/interrupts
CPU0 CPU1 CPU2 CPU3
0: 12 0 0 0 IO-APIC 2-edge timer
1: 10 0 0 0 IO-APIC 1-edge i8042
4: 8320 0 0 0 IO-APIC 4-edge ttyS0
8: 1 0 0 0 IO-APIC 8-edge rtc0
9: 0 0 0 0 IO-APIC 9-fasteoi acpi
12: 15 0 0 0 IO-APIC 12-edge i8042
14: 3946 0 0 0 IO-APIC 14-edge ata_piix
15: 10467 0 0 0 IO-APIC 15-edge ata_piix
24: 0 0 0 0 PCI-MSI 49152-edge virtio0-config
25: 1319342 998595 21305 662767 PCI-MSI 49153-edge virtio0-input.0
26: 18809273 1861754 94243 240903 PCI-MSI 49154-edge virtio0-output.0
27: 1 0 0 1 PCI-MSI 49155-edge virtio0-input.1
28: 3225696 39537753 9226 373752 PCI-MSI 49156-edge virtio0-output.1
29: 0 0 0 0 PCI-MSI 49157-edge virtio0-input.2
30: 2 0 77757739 0 PCI-MSI 49158-edge virtio0-output.2
31: 0 0 0 0 PCI-MSI 49159-edge virtio0-input.3
32: 532443 7321 75828 25252939 PCI-MSI 49160-edge virtio0-output.3
NMI: 0 0 0 0 Non-maskable interrupts
LOC: 592719 558143 617420 333494 Local timer interrupts
SPU: 0 0 0 0 Spurious interrupts
PMI: 0 0 0 0 Performance monitoring interrupts
IWI: 0 0 0 0 IRQ work interrupts
RTR: 0 0 0 0 APIC ICR read retries
RES: 764430 689118 641509 422826 Rescheduling interrupts
CAL: 511 890 672 952 Function call interrupts
TLB: 4 0 0 0 TLB shootdowns
TRM: 0 0 0 0 Thermal event interrupts
THR: 0 0 0 0 Threshold APIC interrupts
DFR: 0 0 0 0 Deferred Error APIC interrupts
MCE: 0 0 0 0 Machine check exceptions
MCP: 34 34 34 34 Machine check polls
ERR: 0
MIS: 0
PIN: 0 0 0 0 Posted-interrupt notification event
NPI: 0 0 0 0 Nested posted-interrupt event
PIW: 0 0 0 0 Posted-interrupt wakeup event
SMP affinity output :
/proc/irq/25/smp_affinity:1
/proc/irq/26/smp_affinity:2
/proc/irq/27/smp_affinity:8
/proc/irq/28/smp_affinity:2
/proc/irq/29/smp_affinity:2
/proc/irq/30/smp_affinity:4
/proc/irq/31/smp_affinity:1
/proc/irq/32/smp_affinity:8
irqbalance_debug_output.txt
Attached: irqbalance debug output
thats....the purpose of irqbalance. To ensure that no single cpu gets tied up handling every interrupt. I'm not sure what you are asking here
yeah I understand but all the other IRQ's are not active, that was my question. In some other case, we could see all the IRQ's are active instead of just one IRQ in this case.
Irqs aren't triggered by irqbalance, they're triggered by the hardware or software source they are attached to, when a device needs attention from the os. If an irq isn't firing, then theres not data to be serviced on the associated source device
ok then let me check where the irq and the sources are mapped.