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Some experiments I did with the Raspberry Pi Pico

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Z80 Bus access

siriokds opened this issue · comments

commented

Hi, you did a great job and I'm learning from your code. Are you using a book? Could you please add an example of a 8080/Z80 bus style read/write of memory and I/O Ports? I'm trying to do something but a lot of things about PIO are still understandable. Thanks.

commented

Thanks!
I have mainly used the pico datasheet and the C/C++ SDK, but there was a lot (a whole lot) of trial and error involved.
I do not have a 8080 or Z80 or something similar. Do you know a good description of the data/command lines and their timing?

commented

Thanks!
I have mainly used the pico datasheet and the C/C++ SDK, but there was a lot (a whole lot) of trial and error involved.
I do not have a 8080 or Z80 or something similar. Do you know a good description of the data/command lines and their timing?

commented

Thanks!
I have mainly used the pico datasheet and the C/C++ SDK, but there was a lot (a whole lot) of trial and error involved.
I do not have a 8080 or Z80 or something similar. Do you know a good description of the data/command lines and their timing?

I have closed the ticket by mistake, sorry.
Here's a summary for memory access:
http://www.piclist.com/techref/mem/dram/slide4.html

Consider that Z80 uses /mreq low for memory requests (A0-A15 for memory address) and /mreq high for i/o requests (A0-A7 for port number). /RD and /WR in combination with /request are often proposed to bus as /MEMRD, /MEMWR, /IORD, /IORW for "control" as my system does. So you have 16pins for address (A0-A15), 4 pin for control, and 8bit bidirectional databus.
Consider that level shifter to interface 5v and 3.3v ICs e.g. 74LVC745 have two sides A and B and usually side A is for 3.3V. This chip contains 2 pins to be controlled: DIR pin (0 for A to B and 1 for B to A) and a /OE to activate (low) level shifter to read or write data to bus. Usage of /OE is necessary set to avoid bus contentions.

commented

Thanks!
I have mainly used the pico datasheet and the C/C++ SDK, but there was a lot (a whole lot) of trial and error involved.
I do not have a 8080 or Z80 or something similar. Do you know a good description of the data/command lines and their timing?

I have a Logic analyzer in order to give you perfect timings. Consider 3.58MHz as Z80 clock used in many systems like MSX o SC-3000 (like mine).

For other info, timings or pictures, ask me. ;)
IMG_20210816_081500__01

commented

Thanks!
I have mainly used the pico datasheet and the C/C++ SDK, but there was a lot (a whole lot) of trial and error involved.
I do not have a 8080 or Z80 or something similar. Do you know a good description of the data/command lines and their timing?

I've found this project for Apple bus as starting point but it's needed something different:

https://github.com/phooky/bootarooni

commented

Thanks!
I have mainly used the pico datasheet and the C/C++ SDK, but there was a lot (a whole lot) of trial and error involved.
I do not have a 8080 or Z80 or something similar. Do you know a good description of the data/command lines and their timing?

Here's the user manual of Z80 with cycles for memory access and I/O access:

http://www.zilog.com/docs/z80/um0080.pdf

commented

That's a lot of information. I'll have to try some things. I'll contact you directly via email.