rmw operation as part of interface

[m-kru]

rmw operation requires 3 values: address, value and mask. If there is any hardware engine capable of performing such operations, then it needs 3 writes. rmw needs 2 operations read + write. However, when the roundtrip from the machine with CPU to the hardware is relatively longer than hardware read/write transactions, and multiple transactions can be sent within single network packet, then scheduling and 3 writes operations is overall shorter. Example:

                  5 ms
Host with CPU <----------> Hardware with bus

Bus transaction time is negligibly small.
In case of read + write, rmw will take approximately 15 ms (order read transaction + send read result + order write transaction) .
If multiple transaction orders can be sent in the same network packet and hardware supports rmw, then the rmw will take approximately 5 ms (order 3 write transactions).
Even if single transaction requires single network packet, then 3 write transactions can be sent one after another, as there is no need to wait for the read result, and the overall latency is still much smaller than 15 ms.

Therefore, rmw should be part of the interface, however the exact implementation is left for the user.