FPGAwars / apio-ide

:seedling: Experimental open FPGA IDE using Atom and Apio

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Add error detection in the upload command

Obijuan opened this issue · comments

Syntax errors are checked when the build button is pressed (it should highligh the error and move the cursos there). But it is not done when the upload button is pressed. It is not correct. It should also highlight the error line if an error appear in the building process when the upload has been clicked

Using "linter-verilog" you have automatic syntax check: 35d2f70.