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Dawn-seagull / 19-20-Computer_architecture_lab

19-20Autumn Computer_architecture experiment UCAS

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**科学院大学 2019-2020秋季学期 体系结构实验课

开发基于mips指令集的较完备的五级前递流水CPU

使用AXI总线进行内存与CPU的交互

支持常见的例外处理

实现了TLB与Cache

代码与实验报告仅供参考，不可抄袭。若有引用请注明来源。

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19-20Autumn Computer_architecture experiment UCAS

License:MIT License

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Language:VHDL 53.9%Language:Assembly 43.0%Language:Verilog 2.3%Language:C 0.5%Language:Shell 0.2%Language:C++ 0.0%Language:Makefile 0.0%Language:Stata 0.0%Language:Tcl 0.0%Language:JavaScript 0.0%Language:HTML 0.0%Language:Forth 0.0%Language:Batchfile 0.0%Language:Pascal 0.0%