Order operation on multiple qubits fails to compile
peter-campora opened this issue · comments
When compiling a simple qasm program via pytket-qir, I hit the following error:
---------------------------------------------------------------------------
ValueError Traceback (most recent call last)
Cell In[14], line 1
----> 1 qir_prog = pytket_to_qir(circuit, name="test_pytket_qir", qir_format=QIRFormat.BINARY)
File ~/hqcompiler-dev/lib/python3.10/site-packages/pytket/qir/conversion/api.py:65, in pytket_to_qir(circ, name, qir_format, wfh, int_type, cut_pytket_register)
50 """converts given pytket circuit to qir
51
52 :param circ: given circuit
(...)
59 into smaller registers, default value false
60 """
62 if len(circ.q_registers) > 1 or (
63 len(circ.q_registers) == 1 and circ.q_registers[0].name != "q"
64 ):
---> 65 raise ValueError(
66 """The circuit that should be converted should only have the default
67 quantum register. You can convert it using the pytket
68 compiler pass `FlattenRelabelRegistersPass`."""
69 )
71 if int_type != 32 and int_type != 64:
72 raise ValueError("the integer size must be 32 or 64")
ValueError: The circuit that should be converted should only have the default
quantum register. You can convert it using the pytket
compiler pass `FlattenRelabelRegistersPass`.
The relevant code to hit the error is:
from pytket.qir.conversion.api import QIRFormat, pytket_to_qir
from pytket.qasm import circuit_from_qasm_str, circuit_to_qasm_str, circuit_from_qasm_wasm
from qjobs import QPU, Batch, Program
from base64 import b64encode
qasm = """OPENQASM 2.0;
include "hqslib1_dev.inc";
qreg q[2];
qreg q1[1];
creg c[2];
creg c2[5];
creg c3[5];
creg c4[5];
c2 = 4;
c3 = 1;
order2 q[0], q1[0];
h q[0];
measure q->c;
"""
circuit = circuit_from_qasm_str(qasm)
# to verify that your qasm is the same after pytket loading, you can use the following
new_qasm_str = circuit_to_qasm_str(circuit, header="hqslib1_dev")
The problem is, that the circuit has two quantum registers, you can solve this with using the pytket pass FlattenRelabelRegistersPass
and it should work. If you think we should apply this pass by default, I am happy to discuss this.
Seems that using pytket-quantinuum or manually invoking that pass, as @cqc-melf mentioned takes care of the issue!