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CMU-SAFARI / ramulator

A Fast and Extensible DRAM Simulator, with built-in support for modeling many different DRAM technologies including DDRx, LPDDRx, GDDRx, WIOx, HBMx, and various academic proposals. Described in the IEEE CAL 2015 paper by Kim et al. at http://users.ece.cmu.edu/~omutlu/pub/ramulator_dram_simulator-ieee-cal15.pdf

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memory trace Driven

sac2019 opened this issue · comments

commented

Hi,

I am confusing about the output results of Ramulator, when we run a memory trace driven on it.
0- what are the best output (for comparison) we could get from the results of memory-trace driven ramulator?
1- what does level_0, level_0_0, ... means?
2- when we have more than one channel in the config (HBM), it report the latency of each channel, how can we estimate the overall performance of the system?
3- the latency is reported by the number of cycle, how can we compare two different memory technology with different cycle rate? (maybe multiply the number of cycle and the cycle rate?) Is it a good indicator for comparing the access time of two different memory system?!
4- Is there any trace with memory trace driven format available for well-known benchmark such as SPEC, TPC, ...?

Regards,

commented

I find out the answer to my questions!
tnx!