Giters

CMU-SAFARI / Pythia

A customizable hardware prefetching framework using online reinforcement learning as described in the MICRO 2021 paper by Bera et al. (https://arxiv.org/pdf/2109.12021.pdf).

Home Page:https://arxiv.org/pdf/2109.12021.pdf

Geek Repo:Geek Repo

Github PK Tool:Github PK Tool

Are other cache levels registered like L2 cache levels?

Yujie-Cui opened this issue · comments

commented

Many thanks for the open source code.

  1. But I see that multi.l2c_pref defines many prefetchers, such as Bingo, BOP, SPP, MLOP. But multi.l1d_pref only defines IPCP, next_line, stride. Although the papers corresponding to other prefetchers indicate that they are used in L2 or LLC, is it possible to directly move the prefetcher defined by multi.l2c_pref to multi.l1d_pref to use these prefetchers at the L1 level? Or I want to use these prefetchers at LLC level, do I just need to write a multi.llc_pref like multi.l2c_pref?

  2. I see that Bingo prefetcher is only defined in multi.l2c_pref. DPC3's open-sourced Bingo runs on the L1D cache, although it uses a large storage overhead. The bingo_l1d_thresh variable is defined in Bingo, which determines whether to prefetch to the L1 level, so does the prefetcher at the L2 level support this function?
    Can Bingo at L2 level prefetch data to L1 cache?

Really Thanks!!!

commented

Pythia/bin/perceptron-multi-multi-no-ship-1core --l2c_prefetcher_types=bingo --config=Pythia/runScripts/../config/bingo.ini --warmup_instructions=20000000 --simulation_instructions=80000000 -traces Pythia/runScripts/../../benchmark/dpc3_traces_ligra/ligra_BC.com-lj.ungraph.gcc_6.3.0_O3.drop_11500M.length_250M.champsimtrace.xz >>Pythia/runScripts/../results/ligra/ligra_BC.com-lj.ungraph.gcc_6.3.0_O3.drop_11500M.length_250M-l2c_bingo-1core.txt

Above is my command to run the benchmark program, I am using Bingo as L2 data prefetcher.
Below is the output, but it is very strange.
But from one point of view, all the prefetching is valid, and the useless prefetching is 0. Isn't this contradictory?

Core_0_L2C_prefetches 79980
Core_0_L2C_prefetch_hit 0
Core_0_L2C_prefetch_miss 79980
Core_0_L2C_prefetch_issued 96131
Core_0_L2C_prefetch_filled 96131
Core_0_L2C_prefetch_useful 96079
Core_0_L2C_prefetch_useless 0

First, all prefetched data is prefetched miss.

Core_0_L2C_total_access 204960
Core_0_L2C_total_hit 101183
Core_0_L2C_total_miss 103777
Core_0_L2C_loads 82563
Core_0_L2C_load_hit 79983
Core_0_L2C_load_miss 2580
Core_0_L2C_RFOs 21217
Core_0_L2C_RFO_hit 0
Core_0_L2C_RFO_miss 21217
Core_0_L2C_prefetches 79980
Core_0_L2C_prefetch_hit 0
Core_0_L2C_prefetch_miss 79980
Core_0_L2C_writebacks 21200
Core_0_L2C_writeback_hit 21200
Core_0_L2C_writeback_miss 0
Core_0_L2C_prefetch_requested 96131
Core_0_L2C_prefetch_dropped 0
Core_0_L2C_prefetch_issued 96131
Core_0_L2C_prefetch_filled 96131
Core_0_L2C_prefetch_useful 96079
Core_0_L2C_prefetch_useless 0
Core_0_L2C_prefetch_late 0