BKJang / do-you-know-backend

๐Ÿ–ฅ This repository contains contents about overall knowledge of backend

Home Page:https://bkjang.github.io/do-you-know-backend

Geek Repo:Geek Repo

Github PK Tool:Github PK Tool

Introduction

BKJang opened this issue ยท comments

Introduction

Computer System์€ ์„ธ ๊ฐ€์ง€ ๊ณ„์ธต์œผ๋กœ ๋‚˜๋ˆŒ ์ˆ˜ ์žˆ๋‹ค.

  • Hardware
  • System(Operating System) => ํ•˜๋‚˜์˜ Harware์—์„œ ์—ฌ๋Ÿฌ ์• ํ”Œ๋ฆฌ์ผ€์ด์…˜์ด ๋Œ ์ˆ˜ ์žˆ๋„๋ก ํ•ด์ฃผ๋Š” ์—ญํ•  (Ease of use to Applications)
  • Application

System์ด๋‚˜ Application์ด๋‚˜ ๋‘˜ ๋‹ค Software์ง€๋งŒ ๋‚˜๋ˆŒ ์ˆ˜ ์žˆ๋Š” ์ด์œ ๋Š” ๋ญ˜๊นŒ?

  • Military, Government Uses => General(์ผ๋ฐ˜์ ์ธ) Purpose๋กœ ์ „ํ™˜
  • ๊ฐ๊ฐ์˜ ๊ธฐ๋Šฅ์„ ํ•˜๋˜ ์ปดํ“จํ„ฐ๋“ค์—์„œ ๊ณตํ†ต์ ์œผ๋กœ ํ•˜๋“œ์›จ์–ด๋ฅผ ์ œ์–ดํ•˜๋Š” ๊ธฐ๋Šฅ์„ ๋ฌถ์œผ๋ฉด์„œ System์ด ๊ตฌ์„ฑ๋œ๋‹ค.

Application vs System vs Hardware

  • Problem Solver vs Execution Environment vs Calculator
  • User of Resources vs Resource Manager vs Resources

System์ด ํ•„์š”ํ•œ ์ด์œ ?

  • Hello World๋ฅผ ํ•œ ์ค„๋กœ ์งค ์ˆ˜ ์žˆ๋Š” ์ด์œ 
  • Application Level์— ์‚ฌ์šฉํŽธ์˜์„ฑ๊ณผ ํšจ์œจ์„ฑ์„ ์ œ๊ณต
  • Hardware Level์„ ๋ณดํ˜ธ(๊ฐ๊ฐ์˜ Application์ด Hardware์— ์ง์ ‘์ ์ธ ์˜ํ–ฅ์„ ๋ฏธ์น˜์ง€ ์•Š๋„๋ก) - Protection
  • JVM, Tomcat๋„ ๊ฒฐ๊ตญ Application Level

Hardware

  • Turing Machine์˜ Head๋Š” CPU, ๋ ๋Š” RAM.
  • ์š”์ฆ˜ ์ปดํ“จํ„ฐ๋Š” ๋Œ€๋ถ€๋ถ„ ํŠœ๋ง ์™„์ „ํ•˜๋‹ค.
  • System Bus
    • Processor์™€ I/O์™€ Main memory๊ฐ„์˜ ์ •๋ณด๋ฅผ ์ „๋‹ฌํ•˜๊ธฐ ์œ„ํ•œ ๊ทœ์•ฝ

Processor

  • Central Processing Unit(CPU)
  • Store data in a set of registers
    • R0-N
    • PC(Program Counter): ์†Œ์Šค์ฝ”๋“œ๊ฐ€ ์–ด๋””๋ฅผ ์‹คํ–‰ํ•˜๊ณ  ์žˆ๋Š”์ง€๋ฅผ ๊ฐ€๋ฆฌํ‚ด
    • SP๏ฟฝ(Stack Pointer): ์Šคํƒ์„ ๊ฐ€๋ฆฌํ‚ด
    • LR(Link Register)

ControlUnit: Head๋ฅผ ์›€์ง์ด๋Š” ์—ญํ• 

  • Store data in a set of registers (Control Unit) => ํ•˜๋“œ์›จ์–ด๋ฅผ ์ปจํŠธ๋กคํ•˜๋Š” ์—ญํ• 
    • ์˜ˆ๋ฅผ ๋“ค์–ด, ๋ชจ๋‹ˆํ„ฐ๋ฅผ ํ‚ค๊ธฐ ์œ„ํ•ด ๋ชจ๋‹ˆํ„ฐ์— '์ผœ์ค˜!'๋ผ๋Š” ๋ช…๋ น์„ ์ „๋‹ฌํ•˜๋Š” ๊ฒƒ

ALU: Turing Machine์˜ Head๊ฐ€ ์–ด๋””๋กœ ์›€์งˆ์ผ์ง€๋ฅผ ๊ณ„์‚ฐํ•ด์ฃผ๋Š” ์—ญํ• 

  • Arithmetic logic circuit (ALU)
    • ์˜ˆ๋ฅผ ๋“ค์–ด, int a = 2;์—์„œ a์— 2๋ฅผ ํ• ๋‹นํ•˜๋Š” ๊ฒƒ
  • ํ•˜๋‚˜์˜ ๋ ˆ์ง€์Šคํ„ฐ์—์„œ ๋‹ด์„ ์ˆ˜ ์žˆ๋Š” ๋ฐ์ดํ„ฐ๋Š” 32๋น„ํŠธ ์ปดํ“จํ„ฐ๋Š” 32๋น„ํŠธ 64๋น„ํŠธ ์ปดํ“จํ„ฐ๋Š” 64๋น„ํŠธ(R0-N, PC, SP, LR)
    • PC(Program Counter): ํ”„๋กœ๊ทธ๋žจ์„ ์ˆœ์ฐจ์ ์œผ๋กœ ์ˆ˜ํ–‰ํ•˜๋Š” ๋ ˆ์ง€์Šคํ„ฐ
    • SP(Stack Pointer): Stack์•ˆ์—์„œ ๊ฐ€์žฅ ๋งˆ์ง€๋ง‰์— ๋“ค์–ด๊ฐ„ ์œ„์น˜๋ฅผ ๊ฐ€๋ฆฌํ‚จ๋‹ค.
    • LR(Link Register): function์„ ์ˆ˜ํ–‰ํ•˜๊ณ  ๋Œ์•„๊ฐˆ ์œ„์น˜๋ฅผ ์ €์žฅํ•ด๋†“์€ ๋ ˆ์ง€์Šคํ„ฐ
  • Read data and instructions from main memory(Control Unit)
    • ํฐ ๋…ธ์ด๋งŒ ์•„ํ‚คํ…์ณ: Data์™€ Instruction์„ ๋‹ค ๊ฐ™์ด ๊ฐ–๊ณ  ์žˆ๋Š” ๊ตฌ์กฐ(ํ˜„์žฌ ๋Œ€๋ถ€๋ถ„์˜ ์ปดํ“จํ„ฐ)
      • CPU - Memory(Data + Instruction)
    • ํ•˜๋ฒ„๋“œ ์•„ํ‚คํ…์ณ: Data์™€ Instrunction์„ ๋”ฐ๋กœ ๊ฐ–๋Š” ๊ตฌ์กฐ
      • Memory(Data) - CPU - Memory(Instruction)

Main Memory(RAM, Random Access Memory) - Primary Storage

  • Volatile(ํœ˜๋ฐœ์„ฑ)
  • rewritable(Data์˜ overwrite)
  • random-accessible
  • Array of bits, bytes, kilobytes... and words
    • word: cpu๊ฐ€ ๋ฉ”๋ชจ๋ฆฌ์—์„œ ํ•œ ๋ฒˆ์— ์ฝ์–ด์˜ฌ ์ˆ˜ ์žˆ๋Š” ๋‹จ์œ„
  • Each byte has its own address
  • 32๋น„ํŠธ ์ปดํ“จํ„ฐ๋Š” 2^32๋น„ํŠธ ๋งŒํผ์„ ์“ธ ์ˆ˜ ์žˆ๋Š”๋ฐ ์ด๋Š” 4GB์ด๋ฏ€๋กœ ๋ฉ”๋ชจ๋ฆฌ๋Š” 4GB๋งŒ ์“ธ ์ˆ˜ ์žˆ๋‹ค.

Processor์™€ Main Memory

  • Instruction Cycle
    • Fetch an instruction from the memory address written in PC.
    • Decode and execute th instrction then write back.
    • Update the value written in PC.
  • Fetch => Decode => Execution
  • Fetch instruction from the address of memory written in PC.(Automatically)
  • Decode and execute the instruction
  • Update the value written in PC to point next address(Automatically)

I/O => Storage - Secondary Storage

  • Non-volatile, huge compared to Main memory
  • slower than main memory
  • rapidly emerging, evolving => HDD / SSD / PRAM
    • PRAM(Persistent RAM) : RAM + Storage

Storage Device Hierarchy

  • Small but Fast => Huge but Slow
  • Register < Cahce < RAM < SSD < HDD < External Storage

Primary

  • Register
  • Cache: ํ•˜๋ฒ„๋“œ ์•„ํ‚คํ…์ณ๋ฅผ ์‚ฌ์šฉ(์†๋„๊ฐ€ ์ตœ์šฐ์„ ์ด๊ธฐ ๋•Œ๋ฌธ์— Data Cache์™€ Instrunction Cache๋ฅผ ๋ถ„๋ฆฌ)
  • RAM

Secondary

  • SSD
  • HDD

Tertiary

  • External Storage

Processor์™€ I/O

  • IO
    • The way users get/put the data, from/to computer.
    • Mostly, have their own controller.
    • Device controllers operate independently.
    • Driver: CPU์™€ I/O๊ฐ„์˜ ํ†ต์‹ ํ•˜๊ธฐ ์œ„ํ•œ ๊ทœ์•ฝ์ด ์ •์˜๋œ ๊ฒƒ.

Interrupts

  • The way to synchronize I/O devices and CPU
  • The signal for devices to inform CPU(e.g. finish its job)
  • CPU must handle interrupts as soon as possible

Life of Interrupts

  • An I/O device raises an iterrupt by sending signal to CPU(Interrupt Request, IRQ)
  • Interrupt controller wihin CPU catches th signal
  • CPU jumps to interrupt vector, dispatch and clear IRQ.(Interrupt Service Routine, ISR)

System Bus

  • Processor, I/O, Main Memory๊ฐ„์˜ ๋ฐ์ดํ„ฐ๋ฅผ ์ฃผ๊ณ  ๋ฐ›์„ ์ˆ˜ ์žˆ๋„๋ก ํ•ด์ฃผ๋Š” ์—ญํ• 
  • ๋ฐ์ดํ„ฐ๋ฅผ ์–ด๋–ป๊ฒŒ ์ฃผ๊ณ  ๋ฐ›์„์ง€๋ฅผ ์ •ํ•ด๋†“์€ ์ธํ„ฐํŽ˜์ด์Šค

How can we print out "Hello World" with single line?

  1. CPU moves program from storage to main memory.
  2. CPU commands a serial device to print out a chracter.
  3. Serial Device๋Š” ๋ฌธ์ž๋ฅผ ์ถœ๋ ฅํ•˜๊ณ  ๊ทธ ๋‹ค์Œ ๋ฌธ์ž๋ฅผ CPU์—๊ฒŒ ์š”์ฒญ.

DMA(Dynamic Memory Access)

  • DMA๋„ I/O๊ธฐ ๋–„๋ฌธ์— Interrupt๊ฐ€ ๋ฐœ์ƒํ•œ๋‹ค.
  • ์œ ์ผํ•˜๊ฒŒ ๋ฉ”๋ชจ๋ฆฌ์— ์ง์ ‘ ์ ‘๊ทผ ๊ฐ€๋Šฅํ•œ ์•„์ด
  • ์œ„์˜ 2~3์˜ ๊ณผ์ •์—์„œ overhead๊ฐ€ ์ผ์–ด๋‚  ์ˆ˜ ์žˆ๋Š”๋ฐ DMA๋ฅผ ํ†ตํ•ด CPU์—๊ฒŒ ๋งค๋ฒˆ ๊ฐ€๋˜ Interrupt๋ฅผ DMA์—์„œ ์ˆ˜ํ–‰ํ•œ๋‹ค.

Single-Processor System

  • Core : Execute instruction and stroe data locally
  • With other components to support the core
  • Processor became bottleneck

Multi-Processor System

  • Multiple processors with single core for each
  • AMP(Asymmetric Multi Processing)
    • ๊ฐ๊ฐ์˜ ํ”„๋กœ์„ธ์„œ๋Š” ๋‹ค๋ฅธ ์—ญํ• 
  • SMP(Symmetric Multi Processing)
    • ๊ฐ๊ฐ์˜ ํ”„๋กœ์„ธ์„œ๊ฐ€ ๋ชจ๋“  ์—ญํ• ์„ ๋ถ„์‚ฐ
    • ์ผ๋ฐ˜์ ์œผ๋กœ SMP๋ฐฉ์‹์„ ์ฑ„ํƒ
  • To increase throughput N times
  • However, the throughput actually is "<=N" times

Multi-Core System

  • Multiple cores within single processor
  • Fast communication and low power consumption(๋ฉ€ํ‹ฐ ํ”„๋กœ์„ธ์„œ ์‹œ์Šคํ…œ์€ ์‹œ์Šคํ…œ ๋ฒ„์Šค๋ฅผ ํ†ตํ•ด ํ†ต์‹ ํ•˜์ง€๋งŒ ๋ฉ€ํ‹ฐ ์ฝ”์–ด ์‹œ์Šคํ…œ์€ ๋‚ด๋ถ€์ ์œผ๋กœ ์ผ์–ด๋‚˜๊ธฐ ๋•Œ๋ฌธ์— ์ƒ๋Œ€์ ์œผ๋กœ ์„ฑ๋Šฅ์ด ๋” ์ข‹๋‹ค)
  • Still have some problem, but currently standard

NUMA(Non-Uniform Memory Access)

  • Multiple processors with local memory for each (ํ”„๋กœ์„ธ์„œ๋ณ„๋กœ ๋ฉ”๋ชจ๋ฆฌ๊ฐ€ ๋‹ค ๋”ฐ๋กœ ์กด์žฌ)
  • ์ฝ”์–ด๋Š” ์—ฌ๋Ÿฌ ๊ฐœ์ง€๋งŒ ๋ฉ”๋ชจ๋ฆฌ๋Š” ํ•˜๋‚˜๋‹ค๋ณด๋‹ˆ ๋ชจ๋“  ์ฝ”์–ด์—์„œ ํ•˜๋‚˜์˜ ๋ฉ”๋ชจ๋ฆฌ์— ์ ‘๊ทผํ•˜๊ฒŒ ๋œ๋‹ค. ๊ทธ๋Ÿฌ๋‹ค๋ณด๋‹ˆ ์‹œ์Šคํ…œ ๋ฒ„์Šค์— ๋ณ‘๋ชฉํ˜„์ƒ์ด ์ผ์–ด๋‚œ๋‹ค.
  • Latency on remote access <= This is hot
  • Memory๊ฐ„์˜ ๋™์‹œ์„ฑ ์ฒ˜๋ฆฌ๋Š” Core ๊ฐ„์˜ ํ†ต์‹ ์œผ๋กœ ํ•ด๊ฒฐ
  • ๋ฌผ๋ฆฌ์ ์œผ๋กœ Memory๊ฐ€ ์—ฌ๋Ÿฌ ๊ฐœ

Clustered System

  • Multiple Computers with single storage
  • Asymmetric Clustering
    • ํ•˜๋‚˜์˜ ์ปดํ“จํ„ฐ๊ฐ€ ์ฃฝ๋Š”๋‹ค๋ฉด ๋ชจ๋‹ˆํ„ฐ๋ง๋งŒ ํ•˜๋˜ ์ปดํ“จํ„ฐ๊ฐ€ ๊ทธ ์—ญํ• ์„ ์ˆ˜ํ–‰
  • Symmetric Clustering
    • ๋ชจ๋“  ์ปดํ“จํ„ฐ๊ฐ€ ๋ชจ๋‹ˆํ„ฐ๋ง์„ ์ง„ํ–‰ํ•˜๊ณ  ๊ฐ€์žฅ ์—ฌ์œ  ์žˆ๋Š” ์ปดํ“จํ„ฐ๊ฐ€ ์ฃฝ์€ ์ปดํ“จํ„ฐ์˜ ์—ญํ• ์„ ์ˆ˜ํ–‰
  • High availability service
  • Need to reprogram application for parallelization

Today's Computer System

  • Personal Computing
  • Embedded mobile computing
  • Client-server computing
  • Peer to peer computing
  • Cloud Computing
  • Real-time embedded computing

System

Life of Operating System (Boot Sequence)

  • ์ตœ์†Œ 1๊ฐœ์˜ ๋ฉ”๋ชจ๋ฆฌ์™€ 1๊ฐœ์˜ Core
  • Boot Loader๋ฅผ ํ†ตํ•ด Memory์— OS๊ฐ€ ์˜ฌ๋ผ๊ฐ
  1. Initialize primary CPU and other components in processor
  2. Set up system components to operates computer
  3. Wake secondary CPUs and initialize devices (ex. DMA ์ดˆ๊ธฐํ™”)
  4. Execute system programs(daemon) and become idle
  5. OS Waiting for any events to occur

Execution of Application Software

  1. Program initially is stored in storage device
  2. Load progream into main memory
  3. Execute code of program line by line

Process

  1. Active instance of program in execution
  2. Use computer resources to perform its tasks
  3. What if process becomes idle?

Multiprogramming

  • ํ•˜๋‚˜์˜ ํ”„๋กœ์„ธ์Šค๊ฐ€ ๋†€๊ณ  ์žˆ๋Š” ๋™์•ˆ์—๋Š” ๋‹ค๋ฅธ ํ”„๋กœ์„ธ์Šค๋ฅผ ์‹คํ–‰
  • Keep users stisfied and reduce CPU idle time
  • Need techniques for resources to be shared

Multitasking

  • ์—ฌ๋Ÿฌ ๊ฐœ์˜ ํ”„๋กœ์„ธ์Šค๋ฅผ ๋†€๊ณ  ๋™์ž‘ํ•˜๊ณ ๋ฅผ ๋ฐ˜๋ณต
  • ์‹œ๋ถ„ํ•  ์šด์˜์ฒด์ œ
  • Switch processes periodically and frequently
  • Provide faster response time to users
  • Use timer to maintain control over CPUs
    • timer
      • Use clock signal and tick counter to get percise time
      • Periodic - Generate interrupts on every N times
      • One shot - Generate interrupts after N ticks

Multimode Operation

  • Hardware support for various execution modes
  • At least two level - Kernel mode & user mode
  • Limit every hardware access and some instructions
  • mode bit๋ฅผ ํ†ตํ•ด User Mode์™€ Kernel Mode๋ฅผ ๋”ฐ๋กœ ๊ด€๋ฆฌ

Scenario of Multimode Operation

  • OS booting scene: Kernel Mode
  • After booting: User Mode
  • Any events given to Kernel: Kernel Mode
  • User Mode => Kernel Mode๋กœ ์˜ค๋Š” ๊ฒฝ์šฐ๋ฅผ Exception(Trap)
    • Unauthorized hardware access from application
    • Interrupts raised by any hardware devices
    • Service requests from application to kernel
    • ๊ฒฐ๊ตญ System Call(Software Interrupt, SWI)๋„ Exception์„ ํ†ตํ•ด์„œ ์ผ์–ด๋‚˜๋Š” ๊ฒƒ
  • Kernal Mode์™€ User Mode๊ฐ€ ์„œ๋กœ ๋„˜์–ด๊ฐˆ ๋•Œ Context Switching์ด ์ผ์–ด๋‚œ๋‹ค.

Today's Operating System(POSIX Standard๋ฅผ ํ†ตํ•ด ๊ฐœ๋ฐœ)

  • Multics(1964 / MIT, AT&T, GE)
  • UNIX(1969 / Dennis Ritchie) - With C Language
  • BSD(1977 / CSRG @ UC Berkeley)
  • LINUX(1991 / Linus Trovalds) - And ... Git in 2005
  • Darwin(2000 / Apple)
  • Windows NT(1993 / Microsoft)