AndrewD / litecan

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How to use this

danielkucera opened this issue · comments

Hi @AndrewD ,
Thank you very much for this project, I would like to use this module.

Is it working?
Do you have some example implementation?

Thank you.

My ultimate goal is a usb/ethernet to multiple (3,4,5, more...) can bus converter. It would forward all received messages from all can buses to ethernet (probably UDP) and those from ethernet back to respective can bus.
It would sit in my car and provide easy interface for logging all the data.

I believe this should be possible without some advanced OS, just a basic firmware running on risc-v soc but I am just a noob, we will see how it goes...

As you say it should be mostly usable, I'm going to try to synthesize the soc with this module.
If I find some issues, I'm gonna report them if you agree.

I've pushed some local changes from last year and some cleanups from today that should help a lot.

Hi Daniel,

How are you going with litecan? Did you have success building vhdl directly, for example? I've done more testing and with a patch the Linux driver is successfully sending messages but the receive fifo has issues, which I suspect is due the an issue with either ghdl>verilog or the verilog build for exp5. I'll try another FPGA family (xylinx or efinix) in a day or two.

Daniel: I've pushed a commit to that fixes and issue with the IP core bus integration and the Linux CAN driver now works OK: can transmit and receive messages.

Sorry for the silence but I have about 300 hundred projects in progress so I am jumping between them :)
Unfortunately, I don't have such a big FPGA to run Linux on Litex, Spartan 6 is the biggest I have and for EBAZ4205 there is no support for Litex yet AFAIK.

Btw, have you seen the mainlining effort from Pavel Pisa? https://marc.info/?t=164790573600002&r=1&w=2
Maybe you can suggest your patches there.